Crosstalk-Solutions/project-nomad+13k ★+428%HOT
mattpocock/skills+6.1k ★+147%
mvanhorn/last30days-skill+4.1k ★+93%
666ghj/MiroFish+20k ★+90%
jarrodwatts/claude-hud+5.7k ★+74%
msitarzewski/agency-agents+23k ★+58%
koala73/worldmonitor+14k ★+45%
moeru-ai/airi+11k ★+43%
ruvnet/RuView+12k ★+38%
NousResearch/hermes-agent+3.6k ★+38%
vxcontrol/pentagi+3.6k ★+35%
D4Vinci/Scrapling+8.1k ★+33%
pbakaus/impeccable+3.2k ★+31%
rtk-ai/rtk+3.1k ★+30%
FujiwaraChoki/MoneyPrinterV2+5.6k ★+28%Crosstalk-Solutions/project-nomad+13k ★+428%HOTmattpocock/skills+6.1k ★+147%mvanhorn/last30days-skill+4.1k ★+93%666ghj/MiroFish+20k ★+90%jarrodwatts/claude-hud+5.7k ★+74%msitarzewski/agency-agents+23k ★+58%koala73/worldmonitor+14k ★+45%moeru-ai/airi+11k ★+43%ruvnet/RuView+12k ★+38%NousResearch/hermes-agent+3.6k ★+38%vxcontrol/pentagi+3.6k ★+35%D4Vinci/Scrapling+8.1k ★+33%pbakaus/impeccable+3.2k ★+31%rtk-ai/rtk+3.1k ★+30%FujiwaraChoki/MoneyPrinterV2+5.6k ★+28%AXI, AXI stream, Ethernet, and PCIe components in System Verilog
On the radar — signal detected
Score updated Mar 26, 2026
The repos that moved this week, why they matter, and what to watch next. One email. No noise.